More performance through Symmetric Multicore Processing (SMP)
Through the support of Core i processors, complex applications can be processed simultaneously on multiple cores of the processor
The symmetric utilization of multiple cores through RMOS3 ensures a performance increase of up to 100% (combining SIMATIC IPC with two cores)
The implementation of existing applications can be limited to one core if required: Effects such as deadlocks or CPU hopping can thus be avoided without changing the tried-and-trusted application.
Reliable execution of the programs ensures high availability of the system
Memory protection for programs in FLAT memory module (GNU) through MMU (Memory Management Unit) for even greater reliability of execution for the user applications generated from RMOS3-GNU using the development tools
Privilege level mechanisms for protection of the operating system code, operating system data and the operating system stacks from unauthorized access from user programs ensure reliable execution of the operating system
Protected code areas for all applications implemented with paging mechanisms prevent unintentional, mutual overwriting of the program code, make program errors easier to find and reduce the time spent troubleshooting
Stack overflow /underflow monitoring detects encroachment beyond the valid stack area for the application. Invalid memory accesses are prevented.
Null-pointer detection prevents the use of uninitialized pointer variables
Compatibility with existing programs (CAD-UL, GNU) thanks to starting in kernel mode
Greater industrial compatibility thanks to high-speed data access on a rugged system
Resistant to viruses, due to the closed system
UDMA hard disk driver for rapid back-up of large data volumes
Support of High Precision Event Timers (HPET) for long-term accurate time output for logging time events
Support for APIC interrupt controllers with up to 24 high-performance interrupts for optimized utilization of the interrupt resources and improved real-time properties of the overall system
Task cycle times starting with 10 microseconds permit the fastest control cycles on a task level
Support for interrupt sharing on the PCI bus for the use of PCI modules
Quick and easy start-up enhances user friendliness and serviceability
Expanded configurable nucleus for the shortest start-up times on SIMATIC IPC
Configuration over RMOS.INI is 100% compatible to RMOS3 V3.40
Configurable, up to 2 GB RAM disk for backing up temporary data
Configurable APIC, UDMA and HPET support
Output of additional messages in case of error permit a "post mortem" analysis at the developer's workstation without hindering production.
100% downward compatible operating system versions
Revised integral RMOS3 debugger and resource reporter for enhanced evaluation of equipment units
